Reflective and transmissive mode monolithic millimeter wave array system and in-line amplifier using same

ABSTRACT

An amplifier. In the illustrative embodiment, the amplifier includes a monolithic semiconductor substrate and an array disposed on said substrate for coherently receiving and retransmitting electromagnetic energy. In a specific embodiment, the array is implemented with a plurality of cells. Each of the cells includes a dual polarization antenna structure for receiving electromagnetic energy and an amplifier connected thereto. A reflective mode implementation of the present teachings includes an amplifier comprising an ortho-mode feed and a reflective amplifier array adapted to be illuminated by the feed with an input wavefront with a first polarization and to return thereto an amplified wavefront with a second polarization orthogonal to the first wavefront. Another novel aspect of the invention derives from the provision of first and second mirrors dual shaped mirrors for illuminating the array with a planar wavefront and converting the reflected planar wavefront to a spherical wavefront. A transmissive mode implementation of the invention includes an array of unit cells with each unit cell having a receiving antenna and a power amplifier. At least some of the cells have a transmit antenna adapted to send a wavefront in the direction of a received wavefront or in a controlled direction.

REFERENCE TO RELATED APPLICATION

[0001] This is a continuation in part of U.S. patent application Ser.No. 10/153,140 filed May 20, 2002 by K. W. Brown et al. and entitledMONOLITHIC MILLIMETER WAVE REFLECTOR ARRAY SYSTEM (Atty. Docket No. PD01W176) the teachings of which are hereby incorporated herein byreference and from which priority is hereby claimed.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] This invention relates to power devices. Specifically, thepresent invention relates to semiconductor power devices.

[0004] 2. Description of the Related Art

[0005] Techniques have been developed for producing W-band semiconductorpower devices (e.g. 50 Ghz to 120 Ghz). For example Gunn and Impattdiode sources have been developed which produce ¼ watt of power.However, these sources are very expensive. Indium Phosphide HighElectron Mobility Transistor (InP HEMT) amplifiers have been developedwhich produce {fraction (1/10)} watt of power. However these devicesrange from $10,000 to $20,000 in cost. Lastly, technologies are beingdeveloped which produce heat with high-frequency microwave beams. Thesetechnologies require power in the 100 KW to 1 MV range. However, devicesimplemented with these technologies (tubes) may cost millions of dollarseach.

[0006] In general, devices implemented with conventional technologies donot generate affordable power in the W-band. In addition, theflexibility of conventional power systems, such as Gunn and Impattdiodes and InP HEMT amplifiers, is limited.

[0007] Thus, there is a need in the art for a cost effective high powerW-band power system. That is, there is a need in the art for a W-bandpower system that can be inexpensively configured, to provide variableoutput power levels. Lastly, there is a need for a W-band power systemthat takes advantage of current semiconductor manufacturing technologyto minimize costs.

[0008] The above-referenced related U.S. patent application Ser. No.10/010,140 filed Mat 20, 2002 by K. W. Brown et al. and entitledMONOLITHIC MILLIMETER WAVE REFLECTOR ARRAY SYSTEM (Atty. Docket No.PD-01W176) addresses this need by providing a monolithic millimeter wavereflect array system. However, there is a further need for atransmissive mode implementation and for a system or method forproviding an in-line amplifier using the array.

SUMMARY OF THE INVENTION

[0009] The need in the art is addressed by the amplifier of the presentinvention. In the illustrative embodiment, the amplifier includes amonolithic semiconductor substrate and an array disposed on saidsubstrate for coherently receiving and retransmitting electromagneticenergy. In a specific embodiment, the array is implemented with aplurality of cells. Each of the cells includes a dual polarizationantenna structure for receiving electromagnetic energy and an amplifierconnected thereto.

[0010] A reflective mode implementation of the present teachingsincludes an amplifier comprising an ortho-mode feed and a reflectiveamplifier array adapted to be illuminated by the feed with an inputwavefront with a first polarization and to return thereto an amplifiedwavefront with a second polarization orthogonal to the first wavefront.

[0011] Another novel aspect of the invention derives from the provisionof first and second mirrors dual shaped mirrors for illuminating thearray with a planar wavefront and converting the reflected planarwavefront to a spherical wavefront.

[0012] A transmissive mode implementation of the invention includes anarray of unit cells with each unit cell having a receiving antenna and apower amplifier. At least some of the cells have a transmit antennaadapted to send a wavefront in the direction of a received wavefront orin a controlled direction.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013]FIG. 1 is a schematic diagram of an illustrative embodiment of amonolithic, millimeter-wave, active reflect array implemented inaccordance with the teachings of the present invention.

[0014]FIG. 2 displays a high-level block diagram of an individual cellof the array of cells of FIG. 1.

[0015]FIG. 3 magnified, fragmentary exploded view of a single cell ofthe array of FIG. 1.

[0016]FIG. 4 displays a W-band semiconductor layout of an individualcell of the array of the present invention.

[0017]FIG. 5 shows a multistage amplifier with a patch antenna for thearray of FIG. 1 in accordance with the teachings of the presentinvention.

[0018]FIG. 6 shows an in-line amplifier using a reflection amplifierimplemented in accordance with an illustrative embodiment of the presentteachings.

[0019]FIG. 7 is an alternative embodiment of the in-line amplifier ofFIG. 6 by which dual shaped mirrors are used to convert the sphericalwavefront from the feed horn into a planar wavefront.

[0020]FIG. 8 shows an alternative by which the array is implemented as atransmissive array in accordance with an illustrative embodiment of theteachings of the present invention.

[0021]FIG. 8a shows a magnified view of a portion of the array of FIG.8.

[0022]FIG. 8b shows a front view of a single cell of FIG. 8b inaccordance with an illustrative embodiment of the present teachings.

[0023]FIG. 8c shows a rear view of the cell of FIG. 8b.

[0024]FIG. 9 shows an alternative arrangement utilizing the presentteachings with a polarized reflecting element.

[0025]FIG. 10 shows an alternate method of implementing an amplifierusing a partly reflecting/partly transmissive surface in accordance withthe present teachings.

[0026]FIG. 11 is a block diagram of an alternative embodiment of anindividual cell of the array of the present invention.

[0027]FIG. 12 is a diagram showing the invention implemented with asmall number of phase shifters to provide a beam steering capability inaccordance with an alternative embodiment of the present teachings.

DESCRIPTION OF THE INVENTION

[0028] While the present invention is described herein with reference toillustrative embodiments for particular applications, it should beunderstood that the invention is not limited thereto. Those havingordinary skill in the art and access to the teachings provided hereinwill recognize additional modifications, applications, and embodimentswithin the scope thereof and additional fields in which the presentinvention would be of significant utility.

[0029] The present invention is designed to produce high energy densityand high power level RF/Millimeter wave radiation using thequasi-optical spatial power of an array of small amplifiers on a solidstate wafer. In an illustrative reflective mode implementation, eachcell of the array contains a reflection amplifier that receivesradiation and retransmits the amplified signal back into the approximatesame direction from which it was received. The radiation exiting fromthe array is physically like a reflection that has been modified by theindividual amplifier's characteristics. The exiting amplified radiationleaves the array as a coherent wave front.

[0030] The individual amplifier elements are fabricated on a monolithicsolid state wafer. Rather than being diced into individual amplifiers,the elements are electrically connected together with proper biases andground levels on the actual solid state wafer or a sub-set of the wafer.This allows an entire array to be fabricated and electrically biased ona typical 3 to 4 inch diameter solid state wafer. When working in theW-Band Millimeter Wave region this could allow on the order of athousand amplifiers per wafer. Because each solid state amplifier islimited to in the order of 100 mW, the wafer power output would be inthe order of 100 watts.

[0031] From antenna theory, the array elements need to be small withrespect to the wavelength. The amplifiers are built to be 0.5 to 1.0wavelengths or less in side dimension on the individual array elements.The array element includes antennas of two polarizations, bias andground wiring and amplifiers. All the elements are fabricated on thesolid state wafer.

[0032] In the illustrative embodiment, the incident radiation ispolarized and the exiting radiation is shifted to an orthogonalpolarization. Two patch antennas are used per amplifier. The incidentantenna has the same polarization as the incoming radiation to the arrayand the exiting radiation is in the orthogonal plane relative to thetransmit antenna.

[0033]FIG. 1 is a schematic diagram of a monolithic, millimeter-wave,active reflect array implemented in accordance with the teachings of thepresent invention. The array 100 is fed by a conventional low powersource 102, which generates incident energy 104 in the W-band. The array100 includes a plurality of cells 200 disposed on a monolithic substrate300; In the illustrative embodiment, the monolithic semiconductorsubstrate 300 is Indium Phosphide (InP). The monolithic semiconductorsubstrate 300 is in contact with a cold plate 400 for cooling.

[0034]FIG. 2 displays a high-level block diagram of an individual cell200 of the array of cells 100 of FIG. 1. In the preferred embodiment ofthe present invention, each cell 200 is designed to be small withrespect to the wavelength of incident energy directed at the monolithicsemiconductor substrate 300. Thus, in the illustrative embodiment, eachcell 200 is designed to be 0.5 to 1.0 wavelengths or less in width andheight dimensions. Those skilled in the art will appreciate that thepresent invention is not limited to the dimensions of the cells.

[0035] As illustrated in FIG. 2, each cell 200 includes a receive patchantenna 204 for receiving incident energy, an amplifier 206 and atransmit antenna 208. The cells 200 are arranged to receive the incidentenergy 104. The received energy is amplified by the amplifier 206 andretransmitted via the transmit patch antenna 208. The array of cells106, reflect the incident energy 104 and produce reflected energy 108.In the best mode, the incident energy received by the receive patchantenna 204 has a first polarization relative to the receive antenna 204and the reflected energy generated by the transmit patch antenna 208 hasa second polarization relative to the transmit antenna 208 orthogonal tothe first polarization. The reflected energy 108 is reflected in acoherent manner and therefore forms a high power wave front 110 (seeFIG. 1). Those skilled in the art will appreciate that the presentinvention is not limited to the use of patch antennas.

[0036] In the best mode, the array 100 is optimized for high outputpower for a given size, high-efficiency and low cost. A noteworthyaspect of the invention is the practical matter in which thousands oflow power millimeter amplifiers can be used to produce a high powerenergy level.

[0037] Returning to FIG. 1, to maximize the power output and powerdensity, the power of each element must be maximized. This isaccomplished by directly attaching the wafer 300 to the cooling plate400 to remove heat and reduce the temperature of the individualamplifiers to a reliable level for the given output. Ideally, the wafersare attached directly to the cold plate with very thin bonding materialonly so that the cooling heat of the elements is maximized. Theinterconnect wiring should be efficiently cooled. The cold plate 400 cantake several forms such as a heat sink, a thermoelectric cooler or aliquid cooled plate depending on the dynamics of the amplifiers dutycycle without departing from the scope of the present teachings.

[0038]FIG. 3 is a magnified, fragmentary exploded view of a single cellof the array of FIG. 1. In general, in the best mode, very thin layersof a solid state substrate are made using materials of as high a thermalconduction as possible. A deposited and etched layer is then addedproviding all the electrical interconnects, components, amplifiers, andgrounding planes. As discussed more fully below, the dual polarizationantenna structures are disposed in uppermost layers.

[0039] In accordance with an illustrative embodiment of the teachings ofthe present invention, a monolithic InP substrate 300 is formed in aconventional manner. A first metal layer 304 is then applied to thesubstrate using conventional fabrication techniques. The first metallayer 304 serves as a DC supply line for the cell 200. A first layer ofoxide (not shown) is applied to the first metal layer as an intermediatelayer in forming the cell. A second metal layer 306 is then applied. Thesecond metal layer 306 serves as the DC ground of the cell and includesamplifier circuits 206. In addition, the second metal layer 306 servesas an intermediate layer for vias connecting upper layers to the lowermetal layer 304 and the substrate 302. A second layer of oxide isapplied as a second intermediate layer in forming the cell. Lastly,patch antennas are formed in a third metal layer 310.

[0040] In the illustrative embodiment, a monolithic Indium Phosphide(InP) semiconductor substrate is used. An epitaxy layer is formed on thesubstrate to reduce crystalline or contaminate defects. In theillustrative embodiment of the present invention, the substratedimensions are approximately 4 inches by 4 inches.

[0041] The pattern of the amplifier circuit and the antenna circuitincluded in a cell, are implemented in the substrate with a mask. Eachlayer of the semiconductor device is developed using a specific mask.The mask contains the amplifier circuit design and the antenna circuitdesign elements. Both the amplifier circuit design and the antennacircuit design are formed using pattern generation equipment (e.g.computer graphic circuit design equipment), which is driven by a circuitdesign database. The mask starts as a design schematic and is thentransformed into a layout for implementation in the InP substrate. Thefinished mask product is referred to as a recticle. The InP substrate iscoated with a photoresist material. In a photolithography process, themask containing the amplifier and antenna design is exposed by a lightsource, through a lens system, onto the substrate. The mask is thenstepped over to the next area of the substrate and the process isrepeated until the substrate is completely exposed (e.g. this is oftencalled a step and repeat process).

[0042] In the illustrative embodiment, the entire wafer (e.g. 4 inches x4 inches), or a large sub-section of the wafer (e.g. 0.5″ to 0.5″),other wafer fabrication techniques, such as electron beam lithographycan also be utilized. While the invention is not limited to anyparticular fabrication technique, two methods are described here. In afirst method, the input and output feeds of a specific circuit aredesigned such that the output for one mask, physically aligns with theinput for a second mask. As a result, after the step and repeat process,the input and output for each circuit on the substrate align and createa single unified circuit that covers the entire substrate.

[0043] In a second method, a mask is implemented with a dual mask set. Alarger mask, including required power and output connections is etchedinto the entire substrate. The larger mask is implemented at the properlevel in the InP device to facilitate power conduction (e.g. a powerline mask). A second, smaller integrated circuit mask, is then used toetch the integrated circuits into the substrate. The second mask is ahigh resolution mask and is designed so that the integrated circuitsfrom the second mask align with the power line connections etched intothe substrate from the first mask.

[0044] In addition to the two methods for etching the designs into thesubstrate, the mask are designed and the stepper function is performed,so that as many cells as possible are placed in series. This allowshigher voltages and lower currents to be used. As a result the finalcircuit has lower resistive loss, smaller metallic line widths and lowerheat generation. An etch process (wet or dry) is used to remove oxidewhere the photoresist pattern is absent. The photoresist is thenstripped off the substrate, leaving the oxide pattern on the substrate.The substrate is then exposed to high temperature to grow an oxidelayer.

[0045] The oxide acts as a barrier when dopant chemicals are depositedon the surface and diffused into the surface. Alternatively, dopants maybe bombarded into the InP surface. The induced ions create regions withdifferent properties. These regions become the source and drain oftransistors. A deposition process is performed in which, an opening ismade in the oxide to build the transistor's gate region. A thin gateoxide or silicon nitride is deposited through a Chemical VaporDeposition (CVD) process to act as an insulator between the gate and theInP. This is followed by Physical Vapor Deposition (PVD) or “sputtering”of a conductive polysilicon layer to form the transistor's gate.

[0046] An oxidation process is performed in which various oxides aregrown or deposited to insulate or protect the formed transistors. DeepField Oxides are grown to isolate each transistor from its adjacentpartners. Dielectric isolation oxides are deposited to insulate thetransistors from interconnecting layers. Passivation oxides are laterdeposited on top of completed substrate to protect the surface fromdamage.

[0047] Interconnections are made using the photolithography processmentioned above. Contact holes (e.g. vias) are etched down to thetransistor regions to establish circuit connections. Metallization isthen performed. A layer of a metallic substance such as aluminum isdeposited on the surface and down into the via holes. Excess aluminum isetched away after another photolithography process, leaving the desiredinterconnect pattern. Another layer of dielectric isolation oxide isdeposited to insulate the first layer of aluminum from the next. Eachstep produces surface contours. The surface of the wafer is polishedsmooth using techniques such as Chemical Mechanical Planarization. Thesmooth surfaces maintain photolithographic depth of focus for subsequentsteps and also ensure that aluminum interconnects don't deform.

[0048] Layers are then interconnected. Another set of via holes isetched in the dielectric isolation oxide to enable access down to thelayer below. Contact plugs are deposited (often tungsten) into the viasto reach down and make contact to the lower layer. The next layer ofaluminum is deposited, patterned and etched. This process is repeatedfor as many interconnect layers as a required for the design. In thepresent invention, this repeated process forms a cell by matching andmanaging the shielding and dielectric properties of the metal and oxidelayers.

[0049]FIG. 4.displays a W-band semiconductor layout of an individualcell 200 of the array of the present invention. In FIG. 4, the amplifier206 includes an RF: matching network. The RF matching network includesan input matching circuit 402, a transistor/capacitor network 404 and anoutput matching circuit 406. Direct current (DC) power is fed into thenetwork through a DC supply 408. A first isolation inductor 410,isolates DC power from the RF matching network. A capacitor connected toa ground plane is shown as 412. A DC ground is shown as 418. A secondisolation inductor 416, isolates the RF matching network from ground. Asecond capacitor is shown as 414. The capacitors, 404, 412 and 414,isolate the DC power from the RF power and also isolate the RF inputmatching network from the RF output matching network.

[0050]FIG. 5 shows a multistage amplifier with a patch antenna for thearray of FIG. 1 in accordance with the teachings of the presentinvention. In FIG. 5 a first metal layer is shown as 500. The firstmetal layer 500 serves as the DC supply line for the monolithicsemiconductor device. An amplifier network 506 is implemented in thefirst metal layer 500. A second metal layer 502 is shown. The secondmetal layer 502, serves as the DC ground for the monolithicsemiconductor device. A third metal layer 504 is also shown. A patchantenna 510 is implemented in the third metal layer. The patch antenna510 may be implemented with a corrugated wideband patch or a two layercorrugated wideband patch. A plurality of vias 512 establishes DCconnection between the first metal layer 500, the second metal layer 502and the third metal layer 504. An input to the patch antenna is shown as514 and an output from the patch antenna is shown as 516. The amplifiernetwork 506 is designed in series with respect to the DC power and inparallel with respect to RF signals. It should be noted that both the DCsupply (e.g. first metal layer 500) and the DC ground (e.g. second metallayer 502) extend beyond the third metal layer 504, so that when theindividual cells are combined to form an array, a single circuit will beestablished between the cells.

[0051] In each individual cell 200, the first metal layer 500 includesan overlapping portion 518. The overlapping portion 518 is implementedto provide a single DC supply to each cell in the array of cells. Asecond overlapping portion is shown as 520. The second metal layer 502includes the second overlapping portion 520 and is implemented toprovide a single DC ground to each cell in the array of cells. As aresult, each cell in the array of cells combines to form a singlecircuit with a single DC supply and a single DC ground.

[0052] The energy does not have to be radiated into space but can beused in an in-line amplifier configuration.

[0053] Those skilled in the art will also appreciate that the array ofamplifier elements can be assembled with respect to an array sizeoptimized for fabrication. The array elements can then be tiled onto acooling plate until enough elements exist to produce needed output powerlevels.

[0054]FIG. 6 shows an in-line amplifier using a reflection amplifierimplemented in accordance with an illustrative embodiment of the presentteachings. The amplifier 600 has an ortho-mode feed 610 having twoinputs, a vertical mode connector input 612, which sends or receives avertically polarized wave, and the other being a horizontal mode port614 adapted to send or receive a horizontally polarized wave. Theortho-mode feed may be of conventional design and construction. In theillustrative embodiment, the vertical connector serves as a feed inputport and the horizontal mode port serves as an output port.

[0055] The vertically polarized input wave illuminates an array 100 ofreflective amplifier cells implemented in accordance with the presentteachings. The array is disposed on a cooling plate 400. In the bestmode, the plate 400 has channels to allow for the flow of a coolingfluid therethrough. The wave is contained within the walls of a horn620. The horn is conductive and may be corrugated in accordance with thepresent teachings. The wave is received and reflected back down to theortho-mode feed amplified and collimated with an orthogonal (e.g.,horizontal) polarization. The reflected wave is then output via thehorizontal output port 614. Thus, in a single integrated unit, an inputwave is amplified, collimated and output in a desired polarization.

[0056]FIG. 7 is an alternative embodiment of the in-line amplifier ofFIG. 6. The embodiment of FIG. 7 offers an improved power distributionon the array via the use of first and second mirrors 712 and 714. Theamplifier 700 of FIG. 7 includes an ortho-mode feed 701 having a lowpower horizontal waveguide input 702 which provides a low power inputwave 706. The wave is output by an ortho-mode feed horn 705. In theillustrative embodiment, the input wavefront is a Gaussian illuminatedspherical wavefront which reflects off first and second mirrors 712 and714, respectively. The mirrors are dual shaped mirrors designed toconvert the Gaussian tapered spherical wave created by the feed horn 705into a uniformly illuminated plane-wave in the shape of the reflectarray 100. This insures that all of the reflect array unit cells receivethe same amount of input power and therefore create the same outputpower level. Hence, the beam 707 output by the second mirror 714illuminates the reflect array 100 with a uniformly illuminated planarwavefront. In accordance with the above teachings, the array 100 returnsa high power collimated beam 708 with orthogonal polarization (in theillustrative implementation, vertical polarization) to the second andfirst mirrors 714 and 712 respectively. In the best mode, the dualmirrors 712 and 714 are reciprocal such that the reflected planarwavefront is converted back to a spherical wavefront that is efficientlyreceived by the feed horn 705. Thus, the high power beam 708 reflectedby the mirrors is collected by the horn 705 and output via a high powervertically polarized output port 704 thereof.

[0057]FIG. 8 shows an alternative by which the amplifier is implementedas a transmissive array in accordance with an illustrative embodiment ofthe teachings of the present invention. FIG. 8a shows a magnified viewof a portion of the array of FIG. 8. FIG. 8b shows a front view of asingle cell of FIG. 8b in accordance with an illustrative embodiment ofthe present teachings. FIG. 8c shows a rear view of the cell of FIG. 8b.FIG. 8 shows a portion of a monolithic transmission array amplifier 800with an array 801 of unit cells 810. The chip is a monolithicsemiconductor substrate 802 mounted on a heat sink (not shown) withholes 803 therein to accommodate the radiation of the backward facingantenna. In the partial view of the array of FIG. 8b, nine of the unitcells are shown. As illustrated in FIG. 8b, each unit cell 810 includesa receive antenna 812, a power amplifier 814 and a transmit antenna 816(not shown in FIG. 8b). The transmit antenna 816 is shown in the rearview of FIG. 8c. In the illustrative embodiment, the receive antenna 812and the transmit antenna 816 are patch antennas.

[0058] Each unit cell receives a portion of the input wavefront via thereceive antenna thereof. The received signal is amplified and output tothe transmit antenna. The transmit antenna radiates the amplified signalin the direction of the received wavefront. Thus, the wavefront isreceived, amplified and retransmitted in the same direction using theembodiment of FIG. 8. Those skilled in the art will appreciate that byphasing the signals fed to the transmit antennas of the unit cells,using a conventional beam control system and/or fixed or variable phaseshifters (not shown) or by physically adjusting the pointing angle ofthe transmit antennas at the time of manufacture or usingmicro-electro-mechanical devices (MEMS), the direction of the outputbeam may be set at the time of fabrication or controlled dynamically perthe requirements of a given application.

[0059]FIG. 9 shows an alternative arrangement utilizing the presentteachings with a polarized reflecting element. The arrangement 900includes a low power source 902, a reflect array 904 implemented inaccordance with the present teachings and a polarized reflecting element914. The polarized reflecting element 914 could be implemented with aseries of parallel wires or other suitable means known in the art. Thepolarized reflecting element 914 is positioned to reflect low powerenergy 907 from the source 902 of one polarization is reflected to thearray 904. Energy from the reflect array 904 of the orthogonalpolarization is transmitted by the reflecting element 914 as a highpower beam 908. Thus, the element 914 serves to allow a full power beam908 to exit the system.

[0060]FIG. 10 shows an alternate method of implementing an amplifierusing a partly reflecting/partly transmissive surface in accordance withthe present teachings. This arrangement 1000 eliminates the need for alow power feed. An array 1002, implemented in accordance with thepresent teachings, initially emits random signals that illuminate apartially reflective/partially transmissive surface 1004. A portion ofthe input power is transmitted out the surface 1004 as the output beam1005 of the system 1000. The remainder is reflected back as beam 1003onto the array 1002. The spacing ‘d’ of the elements is set up for aninteger number of half wavelengths. This allows the phase locking withtime of all elements on the array 1002. The return signal 1003 hitsseveral elements so any slightly higher power tends to move moreelements into a phase lock. Thus in effect the amplifier array 1002becomes its own source. Thus, those skilled in the art will appreciatethat a novel aspect of the invention is that a monolithic element isused to maximize the power density. Other elements can be added orsurfaces made other than planer in order to optimize or focus the outputwithout departing from the scope of the present teachings.

[0061]FIG. 11 is a block diagram of an alternative embodiment of anindividual cell of the array of the present invention. In the embodimentof FIG. 11, phase shifters are added to the array 200′ to implement beamsteering. In the best mode, a variable phase shifter 205′ is addedbetween the transmit and the receive antennas 204′ and 208′ of eachelement. The amplifier 206′ may be positioned before or after the phaseshifter 205′. The phase shifters of each element are controlled by aconventional beam controller 207′. The beam controller 207′ would beresponsive to user input via a conventional interface shown generally at209′.

[0062] In applications in which it may be prohibitively expensive toprovide a phase shifter on each element to implement electronic steeringin a full phased array with a large number of elements, system phasingand beam steering can be implemented with a smaller number of phaseshifters as shown in FIG. 12.

[0063]FIG. 12 is a diagram showing the invention implemented with asmall number of phase shifters to provide a beam steering capability inaccordance with an alternative embodiment of the present teachings. Inthe embodiment of FIG. 12, a portion of a signal from the in-lineamplifier described herein is radiated out into space and part of it isalso run into a phase shifter 1201. The phased shifted signal is feedback to the array 1000′ via a feedback path 1202 to a distant reflectorelement such as the surface 1004 in FIG. 10. This locks the phasebetween the two amplifier elements 1203 and 1204. This phase lockprocess can be repeated for a few more key elements (e.g. 1205, 1206,etc.) to allow the basic axis of possible tilt of the beam to bedefined. Each amplifier element would feed back to adjacent elementsaround them. In part, this would be a leakage term. Thus, whenimplemented, changing the phase between a few elements far apart wouldcause all the elements between the two to linearly take a phase betweenthe two. This in effect would allow the control of the few elements toallow beam steering or beam pointing stability.

[0064] The monolithic array 1000′ would be designed using conventionaltechniques to have a degree of leakage in amplitude and phase as toallow feed back between elements sufficient for a given application.Having a monolithic amplifier array would allow the tight control anduniformity of elements needed to implement the scheme.

[0065] Thus, the present invention has been described herein withreference to a particular embodiment for a particular application. Thosehaving ordinary skill in the art and access to the present teachingswill recognize additional modifications, applications and embodimentswithin the scope thereof.

[0066] It is therefore intended by the appended claims to cover any andall such applications, modifications and embodiments within the scope ofthe present invention.

[0067] Accordingly,

What is claimed is:
 1. An amplifier comprising: a monolithicsemiconductor substrate and means disposed on said substrate forcoherently receiving and retransmitting electromagnetic energy.
 2. Theinvention of claim 1 wherein said means disposed on said substrate forcoherently reflecting electromagnetic energy includes an array of cells.3. The invention of claim 2 wherein each of said cells includes a firstantenna for receiving said electromagnetic energy.
 4. The invention ofclaim 3 wherein each of said cells includes an amplifier connected tosaid antenna.
 5. The invention of claim 4 wherein each of said cellsincludes a second antenna for transmitting said electromagnetic energy.6. The invention of claim 5 wherein at least one of said antennas is apatch antenna.
 7. The invention of claim 6 wherein said patch antenna isa corrugated patch antenna.
 8. The invention of claim 1 wherein each ofsaid cells includes a dual polarization antenna structure.
 9. Theinvention of claim 1 further including means for splitting a receivedwavefront, reflecting a portion thereof and transmitting a portionthereof.
 10. The invention of claim 5 further including means forreceiving and retransmitting a beam of electromagnetic energy whilecontrolling the direction thereof.
 11. The invention of claim 10 whereinsaid means for receiving and retransmitting a beam of electromagneticenergy while controlling the direction thereof includes a phase shiftercoupled between said first and said second antennas.
 12. The inventionof claim 10 wherein said means for receiving and retransmitting a beamof electromagnetic energy while controlling the direction thereofincludes at least one phase shifter coupled between at least two of saidcells.
 13. An amplifier comprising: an ortho-mode feed and a reflectiveamplifier array adapted to be illuminated by said feed with an inputwavefront with a first polarization and to return thereto an amplifiedwavefront with a second polarization orthogonal to said first wavefront.14. The invention of claim 13 wherein said array includes: a monolithicsemiconductor substrate and means disposed on said substrate forcoherently receiving and retransmitting electromagnetic energy.
 15. Theinvention of claim 14 wherein said means disposed on said substrate forcoherently reflecting electromagnetic energy includes an array of cells.16. The invention of claim 15 wherein each of said cells includes afirst antenna for receiving said electromagnetic energy.
 17. Theinvention of claim 16 wherein each of said cells includes an amplifierconnected to said antenna.
 18. The invention of claim 17 wherein each ofsaid cells includes a second antenna for transmitting saidelectromagnetic energy.
 19. The invention of claim 18 wherein at leastone of said antennas is a patch antenna.
 20. The invention of claim 16said patch antenna is a corrugated patch antenna.
 21. The invention ofclaim 13 further including feed means for illuminating said array. 22.The invention of claim 21 wherein said feed means includes means forilluminating said array with a spherical wavefront.
 23. The invention ofclaim 22 further including means for converting said spherical wavefrontto a planar wavefront.
 24. The invention of claim 23 wherein said meansfor converting said spherical wavefront to a planar wavefront includesat least one reflective element.
 25. The invention of claim 24 whereinsaid means for converting said spherical wavefront to a planar wavefrontincludes first and second mirrors.
 26. The invention of claim 25 whereinsaid first and second mirrors are dual shaped mirrors.
 27. The inventionof claim 18 further including means for receiving and retransmitting abeam of electromagnetic energy while controlling the direction thereof.28. The invention of claim 27 wherein said means for receiving andretransmitting a beam of electromagnetic energy while controlling thedirection thereof includes a phase shifter coupled between said firstand said second antenna.
 29. The invention of claim 27 wherein saidmeans for receiving and retransmitting a beam of electromagnetic energywhile controlling the direction thereof includes at least one phaseshifter coupled between at least two of said cells.
 30. A method forcoherently receiving and retransmitting an electromagnetic wavefrontincluding the steps of: receiving said electromagnetic wavefront andcoherently receiving and retransmitting said electromagnetic wavefrontusing an array of cells disposed on a monolithic semiconductorsubstrate.
 31. The invention of claim 30 further including the step ofdynamically controlling the direction of said retransmittedelectromagnetic wavefront.
 32. A method for coherently reflecting anelectromagnetic wavefront including the steps of: receiving saidelectromagnetic wavefront and providing a spherical wavefront inresponse thereto; converting said spherical wavefront to a planarwavefront and coherently reflecting said planar wavefront using an arrayof cells disposed on a monolithic semiconductor substrate.
 33. Theinvention of claim 32 further including the step of converting saidreflected planar wavefront to a spherical wavefront.